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HASHIMOTO Masanori
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Organization 【 display / non-display 】
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2004.04.01 - 2007.03.31, Department of Information Systems Engineering, Graduate School of Information Science and Technology, Associate Professor
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2007.04.01 - 2016.03.31, Department of Information Systems Engineering, Graduate School of Information Science and Technology, Associate Professor
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2016.04.01 - , Department of Information Systems Engineering, Graduate School of Information Science and Technology, Professor
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2016.04.01 - , Center for Gender Equality Promotion
Education 【 display / non-display 】
Kyoto University Graduated | 1997.03 | |
Kyoto University Completed | Master of engineering | 1999.03 |
Kyoto University Completed | Doctor of Informatics | 2001.03 |
Employment Record 【 display / non-display 】
Instructor, Graduate School of Informatics, Kyoto University | 2001.04 - 2004.03 |
Researcher, Japan Science and Technology Agency | 2001.11 - 2005.03 |
Associate Professor, Graduate School of Information Science and Technology, Osaka University | 2004.04 - 2007.03 |
Associate Professor, Graduate School of Information Science and Technology, Osaka University | 2007.04 - 2016.03 |
Professor, Graduate School of Information Science and Technology, Osaka University | 2016.04 - |
Research topics 【 display / non-display 】
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Integrated system design
Especially,
VLSI design methodology
Low power VLSI design
Design for reliability
Reconfigurable computing
Computer system-related
Academic Papers 【 display / non-display 】
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Muon-Induced Single-Event Upsets in 20-nm SRAMs: Comparative Characterization with Neutrons and Alpha-Particles, T. Kato,M. Tampo,S. Takeshita,Y. Miyake,H Tanaka,M. Hashimoto,IEEE Nuclear and Space Radiation Effects Conference (NSREC), 2020.12, International Conference(Non Proceeding)
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Low-Cost Reservoir Computing Using Cellular Automata and Random Forests, A. Lopez, J. Yu, M. Hashimoto, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2020.10, International Conference(Proceedings)
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1.5x Energy-Efficient and 1.4x Operation-Speed Via-Switch FPGA with Rapid and Low-Cost ASIC Migration by Via-Switch Copy, X. Bai,N. Banno,M. Miyamura,R. Nebashi,K. Okamoto,H. Numata,N. Iguchi,M. Hashimoto,T. Sugibayashi,T. Sakamoto,M. Tada, Technical Digest of VLSI Symposium on Technology, 2020.06, International Conference(Proceedings)
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BYNQNet: Bayesian Neural Network with Quadratic Activations for Sampling-Free Uncertainty Estimation on FPGA, H. Awano,M. Hashimoto, Proceedings of Design, Automation and Test in Europe Conference (DATE), 2020.04, International Conference(Proceedings)
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Fault Diagnosis of Via-Switch Crossbar in Non-Volatile FPGA, R. Doi,X. Bai,T. Sakamoto,M. Hashimoto, Proceedings of Design, Automation and Test in Europe Conference (DATE), 2020.04, International Conference(Proceedings)
Books 【 display / non-display 】
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Special, Book chapter, Power Integrity Analysis and Management for Integrated Circuits, M. Hashimoto,R. Nair, Prentice Hall PTR, 2010.05
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Special, Book chapter, Power Integrity Analysis and Management for Integrated Circuits, R. Nair,M. Hashimoto,N. Srivastava, Prentice Hall PTR, 2010.05
Awards 【 display / non-display 】
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Best Paper Award, T. Amaki, M. Hashimoto, T. Onoye, nstitute of Electronics, Information and Communication Engineers (IEICE), 2016.06
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Senior member, Masanori Hashimoto, IEEE, 2011.09
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Special Feature Award, University LSI Design Contest, Y. Ogasahara, M. Hashimoto, T. Onoye, Asia and South Pacific Design AutomationConference (ASP-DAC), 2008.01
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ASP-DAC 2004 Best Paper Award, A. Tsuchiya, M. Hashimoto and H. Onodera, Asia South Pacific Design Automation Conference, 2004.01
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Yamashita Memorial Award, M. Hashimoto, Information Processing Society of Japan, 2002.11