School personnel information

写真b

Hirose Tetsuya


Organization 【 display / non-display

  • 2019.03.01 - , Division of Electrical, Electronic and Information Engineering, Graduate School of Engineering, Professor

 

Academic Papers 【 display / non-display

  • A sub-1-us Start-up time, fully-integrated 32-MHz relaxation oscillator for low-power intermittent systems, ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro, IEICE Transactions on Electronics,101-C(3) 161-169, 2018.03, Papers

  • An error diagnosis technique based on unsatisfiable cores to extract error locations sets, TAKEZAKI Ayano, OHMURA Syogo, KATAYAMA Naoki, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro, Proceedings of the 21st workshop on synthesis and system integration of mixed information technologies, 81-86, 2018.03, Papers

  • A fully integrated, wide load range, high power conversion efficiency switched capacitor DC-DC converter with adaptive bias comparator for ultra-low-power power management integrated circuit, ASANO Hiroki, HIROSE Tetsuya, KOJIMA Yuta, KUROKI Nobutaka, NUMA Masahiro, Japanese Journal of Applied Physics,57(04FF03), 2018.03, Papers

  • An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting, SATO Takanori, HIROSE Tetsuya, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro, Proceedings of the 2017 IEEE international conference on electronics, circuits and systems, 498-501, 2017.12, Papers

  • A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting, TSUJI Yuto, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro, Proceedings of the 2017 IEEE international conference on electronics, circuits and systems, 502-505, 2017.12, Papers

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Books 【 display / non-display

  • Special, Advanced Circuits for Emerging Technologies, UENO Ken, HIROSE TETSUYA, Wiley, 2012.05

  • Special, Analog CMOS circuits implementing neural segmentation model based on symmetric STDP learning, G.M. Tovar, S.E. Fukuda, T. Asai, HIROSE Tetsuya, Y. Amemiya, Neural Information Processing, Ishikawa M., Doya K., Miyamoto H., and Yamakawa T., Eds., Lecture Notes in Computer Science, 2008.06

  • Special, Noise shaping pulse-density modulation in inhibitory neural networks with subthreshold neuron circuits, A. Utagawa, T. Asai, HIROSE Tetsuya, Y. Amemiya, Brain-Inspired IT III, Natsume K., Hanazawa A., and Miki T., Eds, International Congress Series, 2007.06

  • Special, Single-flux-quantum circuits for spiking neuron devices, HIROSE Tetsuya, K. Ueno, T. Asai, and Y. Amemiya, Brain-Inspired IT II, Ishii K., Natsume K., and Hanazawa A., Eds., International Congress Series, 2006.06

Patents / Utility models / Designs 【 display / non-display

  • Japan, POWER SUPPLY VOLTAGE CONTROLLING CIRCUIT FOR USE IN SUBTHRESHOLD DIGITAL CMOS CIRCUIT, HIROSE Tetsuya, OSAKI Yuji, MATSUMOTO Kei, 未登録(Registration), 2010.05, 2010.05

  • Japan, REFERENCE CURRENT SOURCE CIRCUIT, HIROSE Tetsuya, KITO Toyoaki, OSAKI Yuji, 未登録(Registration), 2010.05, 2010.05

Awards 【 display / non-display

  • IEEE SSCS Japan Chapter VDEC Design Award, ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro, IEEE SSCS Japan Chapter, 2017.09

  • IEEE SSCS Japan Chapter Academic Research Award, ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro, IEEE SSCS Japan Chapter, 2017.05

  • Best Student Paper Award, ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro, 14th IEEE International NEWCAS Conference, 2016.06

  • The Research Institute of Signal Processing - NSCP'07 Outstanding Student Paper Award, A. Utagawa, T. Asai, HIROSE Tetsuya, Y. Amemiya, RISP, 2007.03